Layout Decomposition for Quadruple Patterning Lithography and Beyond

For next-generation technology nodes, multiple patterning lithography (MPL) has emerged as a key solution, e.g., triple patterning lithography (TPL) for 14/11nm, and quadruple patterning lithography (QPL) for sub-10nm. In this paper, we propose a generic and robust layout decomposition framework for QPL, which can be further extended to handle any general K-patterning lithography (K$>$4). Our framework is based on the semidefinite programming (SDP) formulation with novel coloring encoding. Meanwhile, we propose fast yet effective coloring assignment and achieve significant speedup. To our best knowledge, this is the first work on the general multiple patterning lithography layout decomposition.Comment: DAC'201

Politeness in Historical and Contemporary Chinese

Takes a comparative, diachronic perspective on Chinese politeness and its evolution up to the present day, linking diachronic and synchronic approache

Tractable approximate deduction for OWL

Acknowledgements This work has been partially supported by the European project Marrying Ontologies and Software Technologies (EU ICT2008-216691), the European project Knowledge Driven Data Exploitation (EU FP7/IAPP2011-286348), the UK EPSRC project WhatIf (EP/J014354/1). The authors thank Prof. Ian Horrocks and Dr. Giorgos Stoilos for their helpful discussion on role subsumptions. The authors thank Rafael S. Gonçalves et al. for providing their hotspots ontologies. The authors also thank BoC-group for providing their ADOxx Metamodelling ontologies.Peer reviewedPostprin

Tackling Challenges in Seebeck Coefficient Measurement of Ultra-High Resistance Samples with an AC Technique

Seebeck coefficient is a widely studied semiconductor property. Conventional Seebeck coefficient measurements are based on DC voltage measurement. Normally this is performed on samples with moderate resistances (e.g., below a few MΩ level). Certain semiconductors are intrinsic and highly resistive. Many examples can be found in optical and photovoltaic materials. The hybrid halide perovskites that have gained extensive attention recently are a good example. Despite great attention from the materials and physics communities, few successful studies exist of the Seebeck coefficient of these compounds, for example CH3NH3PbI3. An AC-technique-based Seebeck coefficient measurement is reported, which makes high-quality Seebeck voltage measurements on samples with resistances up to the 100 GΩ level. This is achieved through a specifically designed setup to enhance sample isolation and increase capacitive impedance. As a demonstration, Seebeck coefficient measurement of a CH3NH3PbI3 thin film is performed at dark, with sample resistance 150 GΩ, and found S = +550 µV K−1. The strategy reported could be applied to the studies of fundamental transport parameters of all intrinsic semiconductors that have not been feasible

L-Shape based Layout Fracturing for E-Beam Lithography

Layout fracturing is a fundamental step in mask data preparation and e-beam lithography (EBL) writing. To increase EBL throughput, recently a new L-shape writing strategy is proposed, which calls for new L-shape fracturing, versus the conventional rectangular fracturing. Meanwhile, during layout fracturing, one must minimize very small/narrow features, also called slivers, due to manufacturability concern. This paper addresses this new research problem of how to perform L-shaped fracturing with sliver minimization. We propose two novel algorithms. The first one, rectangular merging (RM), starts from a set of rectangular fractures and merges them optimally to form L-shape fracturing. The second algorithm, direct L-shape fracturing (DLF), directly and effectively fractures the input layouts into L-shapes with sliver minimization. The experimental results show that our algorithms are very effective